Z80 Programming
For Mechatronics
Z80 5seconds Timer for 10 MHz
Point: Use 3 Loops

            ORG 0000H
            LD SP,0FFFFH
 MAIN:   CALL TIMER5
TIMER5:LD E,35H
J60:      LD B,0FFH
J61:      LD D,0FFH
J62:      DEC D
            JP NZ,J62
            DEC B
            JP NZ,J61
            DEC E
            JP NZ,J60
            RET
            END

note: If your system has CTC, it's better to use CTC timer interrupt. Z80 Mode 2 interrupt reduces CPU's load. 
Z80 Multi Vibrator
Point: Use Loop "output  00H and FFH at 1 second interval".

            ORG 0000H
            LD SP,0FFFFH
            PPI1 EQU 37H
            PORTB1 EQU 35H
            LD A,90H
            OUT (PPI1),A
LOOP:   LD A,0
            OUT (PORTB1),A
            CALL TIMER1
            LD A,0FFH
            OUT (PORTB1),A
            CALL TIMER1
            JP LOOP
TIMER1:LD E,0AH
J50:     LD B,0FFH
J51:     LD D,0FFH
J52:     DEC D
           JP NZ,J52
           DEC B
           JP NZ,J51
           DEC E
           JP NZ,J50
           RET
           END

Z80 Bad Coding

Z-80's ADD

When you write Z80 source code, remember...
You can't write this.

Because Z-80's ADC(or ADD) is used by A or HL register only. This is OK.


Infinite Loop

Example code

After this operation "DEC BC(or INC BC)" does not set Z flag even BC is 0.
So this example code can't escape from infinite loop forever.
 

note:BC, DE and HL are 16bits pair registers.


How to work "PUSH"

This example is very short program...

            ORG     0000H
            LD    SP,0FFFFH
            LD    BC,0FFFFH
LOOP:    PUSH BC
            JP LOOP
            END
 

STARTING MEMORY STATUS

0000    31 50 00    LD    SP,FFFF
0003    01 FF FF    LD    BC,FFFF
0006    C5            PUSH BC
0007    C3 06 00   JP    LOOP
000A    00           NOP
000B    00           NOP
-------------------
-------------------
-------------------
FFFF    00           NOP
 

MEMORY STATUS AFTER EXECUTION

0000    31 50 00    LD    SP,FFFF
0003    01 FF FF    LD    BC,FFFF
0006    C5            PUSH BC
0007    C3 FF FF   JP    FFFF ; Changed!
000A    FF            RST    38
000B    FF            RST    38
------------------------
------------------------
------------------------
FFFF    FF            RST    38
 
note:
"LD BC,FFFF";Register BC is set FFFF.
By "PUSH BC"top stack becomes FFFF.
Stack area moves to smaller memory address.
After all, the endless PUSH destroyed even program area.

This program is meaningless.
But you will learn how to work "PUSH" of Z-80's CPU.
                                                                         (Sat,3/7/1998)


 Brunei's homework of Z-80
We got a brunei student's homework of Z-80 by e-mail...
Let's challenge this test!

Section A ( 40 marks)

Answer all questions.
 

1. Comment on the Z80 instruction LD HL, SP. [1]

2. What is the effect of LD HL, 0 followed immediately by ADD HL, SP? [2]

3. What does the instruction EX DE, HL do? [1]

4. What arithmetic gtrickh is associated with the instruction ADD A, A? [2]

5. Is LD BC, HL a valid Z80 instruction? [1]

6. What instruction(s) would be needed to copy HL into BC? [2]

7. Comment on the instruction LD A, (DE) and LD B, (DE)? [2]

8. What happens when JP (HL) is executed? [3]

9. Briefly explain the actions taken by the Z80 on executing a CALL instruction. [4]

10. What does RET instruction do?

11. How will the instruction OR L affect the Z80 flags? [3]

12. With the aid of a diagram, show how RCLA works. [2]  *

13. What condition is required for XOR B to make the sign flag 1 after it is ran? [2]

14. If IX = 2000h what does the instruction LD (IX ? 7), A do? [3]

15. Briefly explain the operation of LDDR. [3]

16. Explain the effects of the NOP instruction. [1]

17. Comment on the instruction CPL A. [2]

18. Is SUB A, B a valid Z80 instruction? [1]

19. Explain the operation of LD A, (HL). [2]

20. What does LD IX, IY do? [1]

* RCLA is RLCA?


Hints
2. is the solution of 1. .
3. DE <--> HL (Exchange with no flag change)
4. 2*A
5., 6. and 20. No instructions in Z80. It is easy code to use stack.
8. Jump to memory address HL shown.
10.Ret is Return from subroutine. What's in the top stack?
12.Rotate left circular accumulator
13.Check MSB of A and MSB of B  (1-0 or 0-1)
15. Instruction of memory block transfer
    Set register before this instruction LDDR.
    HL<-Start memory address
    DE<-Destination address
    BC<-Data amount
16. Nop is often used as debug of timing coordination.
17. Same instruction of XOR
18. SUB B or SBC A,B
06/01/1998

Z-80's Registers

Z-80 Primary registers
A(8bits); 
Accumulator		 PSW(8bits);  
Flag register
B(8bits) C(8bits)
D(8bits) E(8bits)
H(8bits) L(8bits)
Z-80 Alternate registers
A'(8bits) PSW'(8bits)
B'(8bits)  C'(8bits)
D'(8bits) E'(8bits)
H'(8bits) L'(8bits)
 Z-80 Index registers
IX(16bits)
IY(16bits)
 Z-80 Other registers
I(8bits);Interrupt register  R(8bits);Refresh register
     Z-80 Flag registers

    S(1bit) "sign flag" ;+ - of data with sign

    Z(1bit) "zero flag"

    H(1bit) "half carry";used at BCD calculation

    P(1bit) "parity flag" ;even or odd

    V (1bit)"overflow flag"

    N(1bit) "negative flag" add or dec

    C(1bit) "carry flag"

     Pseudo instructions

     ORG "origin"

     DEFB or DB "define byte"

     DW "define word"

     EQU "equal to"

     END "end of program"

 IBM-PC Parallel Port Assignment
Pin #
Function
1
 Strobe (Data Set Signal from PC)
2
 Data bit 0
3
 Data bit 1
4
 Data bit 2
5
 Data bit 3
6
 Data bit 4
7
 Data bit 5
8
 Data bit 6
9
 Data bit 7
10
 Acknowledge(Printer to PC)
11
 Busy
12
 Paper end
13
 Select
14
 Auto feed
15
 Error
16
 Initialize-Input
17
 Select-Input
18-25
 Ground
 
 
 

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